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ADCA / MCA (III Year)
Term-End Examination
|une, 2049
CS-12 : COMPUTER ARCHITECTURE
Time : 3 hours Maximum Marks : 75
Note : Question no. 1 is compulsory. Answer any thtee
questionfsr o* the rest.
1. (u) Discuss the significance of Amdahl's law for
a multiprocessor system. Derive an
expression for speedup for the same.
(b) Consider the following two inter leaved
memory organisation for a main memory
system with 1"6 memory modules. Each
module is assumed to have a capacity of
1 M byte.
Design 1 : L6-way interleaving with one
memory bank.
Design 2 : 8-way interleaving with
two-memory banks.
For this system, calculate the following :
L0
cs-12 P.T.O.
2.
(i) Address format for each organisation
(ii) Maximum memory bandwidth
(") Explain store-and-forward and wormhole 5
messagero uting schemesA. nd also, analyze
their conununication Latencies.
(d) For the given program 2+5+24
I r ' A - D + E
I z : E-BxC
I s r A - C x D
I + , B : L x M
I s , E : X - Y
(i) Illustrate the sequential execution of
the program.
(ii) Illustrate the parallel execution of the
program assuming that the machine
has two adder, two subtractor and
two multiplier units.
(iii) Calculate the speed up attained
using suitable example.
(u) Explain how node duplication helps in
achieving superior perf ormance in a
multiprocessor scheduling environment.
(b) \tVhat is the purpose of prefetch buffers in
instruction pipeli.i.g ? \Atrhaat re the other
kinds of buffers used ? Also, give one
application of each of these buffers.
© Explain briefly Perfect Shuffle network.
cs-1.2
3. (u) Draw and discuss the pipelined execution 1.0
of tasks in a superscaler and a VLIW
processor. Make necessary assumptions of
your choice.
(b) Discuss the utility of RISC and CISC
architectures by comparing their various
features.
(a) A two-level memory system has B virtual
pages mapped into 4-page frame in main
memory. Compute the hit ratio in the main
memory when the page trace is as follows.
3,1,2, 2, 4, 4, 5, 3, 2, 5, 0, 4
Use LRU replacement policy and assume
the page frame initially has 3, 2, 0, 4.
(b) Explain UMA multiprocessor briefly.
(.) Explain the concept of overlapping register
window in SPARC architecture, with the
help of an example.
Write short notes on any three of the following :
(u) PRAM model and its variants
(b) Resource Conflicts in pipeline
© Split Cache architecture
(d) Distributed bus arbitration mechanism
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cs-1.2
